About

Jérémie is a 27 years old man, and received his PhD from Université de Bretagne Sud in electronics and computer Science in 2011. He was a student in the French lab Lab-STICC in Lorient with professor Guy Gogniat, PhD engineer Pierre Bomel and CNRS researcher Jean-Philippe Diguet. While doing his thesis, Jérémie brought analog and digital electronic, programming language and computer science courses (Technical Institute of Lorient). From 2011 to 2012, he was a postdoc student at LIRMM in Montpellier, under the guidance of professor Lionel Torres and associate professor Pascal Benoît. He studied embedded systems security and partial reconfiguration. His research was funded by the French National Research Agency (ANR) project SecReSoC.

He is now an associate professor at ENSEIRB-MATMECA/IMS in Bordeaux.

Profile , Curriculum Vitae (old) 

Activities

Research

Keywords

Algorithm-architecture matching, digital signal processing, applied cryptography, operating systems, networks, embedded systems, hardware accelerators, reconfigurable architectures, multiprocessor architectures, FPGA, ASIC.

Fundings

  • ANR SecReSoC project (2009-2012)
  • ARED région Bretagne (2008-2011)

Collaborations

2009 and 2010+ : collaboration with the Reconfigurable Computing Group (RCG) and his advisor, professor Russell Tessier, University of Massachusetts, Amherst, USA

Chairs and Reviews

Jérémie served as session chair at International Conference on Field-Programmable Technology (FPT 2011). He also reviewed manuscripts for Reconfigurable Architectures Workshop (RAW 2011), IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2010), International Conference on ReConFigurable Computing and FPGAs (ReConFig 2010), Workshop on Embedded Systems Security (WESS 2010) and International Symposium on Applied Reconfigurable Computing (ARC 2010).

Courses (2008-2011)

  • Master 2 Électronique, Université de Bretagne Sud, TP, Analyse et conception d’un IP de compression LZW en VHDL (20h eq. TD)
  • GIM 1ère année et apprentis, IUT de Lorient, CM/TD/TP, Architectures des microprocesseurs (60h eq. TD)
  • GIM 1ère année et apprentis, IUT de Lorient, TD/TP, Electronique numérique (84h eq. TD)
  • GIM 1ère année, IUT de Lorient, TP, Électronique analogique (48h eq. TD)
Publications

Journal Papers

  • D. Unnikrishnan, R. Vadlamani, Y. Liao, J. Crenne, L. Gao, and R. Tessier, Reconfigurable Data Planes for Scalable Network Virtualizationin IEEE Transactions on Computers, accepted/to appear.
  • J. Crenne, R. Vaslin, G. Gogniat, J.-P. Diguet, R. Tessier and D. Unnikrishnan, Configurable Memory Security in Embedded Systems, in ACM Transactions on Embedded Computer Systems (TECS), accepted/to appear. 

Book Chapters

  • E. Wanderley, R. Vaslin, J. Crenne, P. Cotret, G. Gogniat, J.-P Diguet, J.-L. Danger, P. Maurine, V. Fischer, B. Badrignans, L. Barthe, P. Benoit and L. Torres, Security FPGA Analysisin Security Trends for FPGAs, Springer, ISBN: 978-94-007-1337-6, pp. 7-46.
  • J. Crenne, P. Bomel, G. Gogniat, J.-P Diguet, End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems, in Algorithm-Architecture Matching for Signal and Image Processing, Springer, ISBN: 978-90-481-9964-8, pp. 171-194. 

International Conferences & Workshops Papers

  • P. Cotret, G. Gogniat, J.-P. Diguet and J. Crenne, Lightweight Reconfiguration Security Services for AXI-based MPSoCsin the Proceedings of the International Conference on Field-Programmable Logic and Applications (FPL’12), accepted/to appear, August 29-31, 2012, Oslo, Norway.
  • F. Devic, L. Torres, J. Crenne, B. Badrignans and P. Benoit, Secure DPR: Secure Update Preventing Replay Attacks for Dynamic Partial Reconfigurationin the Proceedings of the International Conference on Field-Programmable Logic and Applications (FPL’12), accepted/to appear, August 29-31, 2012, Oslo, Norway.
  • P. Cotret, J. Crenne, G. Gogniat and J.-P. Diguet, Bus-based MPSoC security through communication protection: A latency-efficient alternative, in the Proceedings of the International Symposium on Field-Programmable Custom Computing Machines (FCCM’12), accepted/to appear, April 29-May 1, 2012, Toronto, Canada.
  • J. Crenne, P. Cotret, G. Gogniat, R. Tessier, and J.-P. Diguet, Efficient Key-Dependent Message Authentication in Reconfigurable Hardware, in the Proceedings of the International Conference on Field-Programmable Technology (FPT’11), December 12-14, 2011, New Delhi, India.  errata
  • P. Cotret, J. Crenne, G. Gogniat, J.-P Diguet, L. Gaspar, G. Duc, Distributed security for communications and memories in a multiprocessor architecture, in the Proceedings of the Reconfigurable Architecture Workshop (RAW’11), May 16-17, 2011 , Anchorage, Alaska, USA. 
  • G. Gogniat, J. Vidal, L. Ye, J. Crenne, S. Guillet, F. de Lamotte, J.-P Diguet, P. Bomel, Self-reconfigurable Embedded Systems: from Modeling to Implementation, in the Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’10), July 12-15, 2010, Las Vegas, Nevada, USA. 
  • D. Unnikrishnan, R. Vadlamani, Y. Liao, A. Dwaraki, J. Crenne, L. Gao, R. Tessier, Scalable Network Virtualization Using FPGAs, in the Proceedings of the International Symposium on Field-Programmable Gate Arrays (FPGA’10), February 21-23, 2010, Monterey, California, USA. 
  • J. Crenne, P. Bomel, G. Gogniat, J.-P Diguet, UDP Partial Bitstreams Diffusion Through WLAN, in the Proceedings of the International Conference on Design and Architectures for Signal and Image Processing (DASIP’09), September 22-24, 2009, Sophia Antipolis, France. 
  • J.-P Diguet, L. Ye, Y. Eustache, J. Crenne, P. Bomel, G. Gogniat, J. Vidal, F. de Lamotte, Networked Self-adaptive Systems: An Opportunity for Configuring in the Large, in the Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’09), July 13-16, 2009, Las Vegas, Nevada, USA. 
  • P. Bomel, J. Crenne, L. Ye, G. Gogniat, J.-P Diguet, Ultra-Fast Downloading of Partial Bitstreams Through Ethernet, in the Proceedings of the International Conference on Architecture of Computing Systems (ARCS’09), March 10-13, 2009, Delft, The Netherlands. 
  • P. Bomel, G. Gogniat, J.-P Diguet, J. Crenne, Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems, in the Proceedings of the International Symposium on Parallel and Distributed Computing (ISPDC’08), July 1-5, 2008, Krakow, Poland. 

National Conferences Papers

  • P. Cotret, J. Crenne, G. Gogniat, Sécurisation des communications dans une architecture multi-processeurs, MAnifestation des JEunes Chercheurs en Sciences et Technologies de l’Information et de la Communication (MajecSTIC’10), October 14, 2010, Bordeaux, France. 

PhD Thesis

  • Sécurité Haut-débit pour les Systèmes Embarqués à base de FPGAs, Université de Bretagne Sud, Décembre 2011, Lorient, France. Thesis , Slides  (in french)
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Links

GHASH

An efficient FPGA implementation of the NIST standardized cryptographic message authentication function GHASH. Suitable for AES-GCM or standalone GMAC and publically available under the new BSD license.

Contact

Jérémie Crenne
Laboratoire IMS – CNRS, UMR 5218
351, cours de la Libération
F-33405 Talence – France

Phone : +33 (0)5 56 84 23 45
Fax : +33 (0)5 56 37 15 45
email : jeremie (dot) crenne (at) ims (dash) bordeaux (dot) fr